1. Field of the Invention
The present invention relates to an integrated device package, and more particularly, to a semiconductor device package, and fabrication methods thereof.
2. Background of the Related Art
Recently, there have been numerous studies on fabricating a semiconductor package having approximately the same size as a semiconductor chip. One type of such a small package, known as a Bottom Leaded Package (BLP), has leads of a lead frame that are stepped, and a semiconductor chip is mounted on the leads. The lead frame and the semiconductor chip are connected and packaged in a molding resin such that outer portions of the leads are exposed on at least a bottom surface of the semiconductor package. A BLP semiconductor package will now be described with reference to FIGS. 1-8.
FIG. 1 is a vertical cross-sectional diagram of a background art BLP semiconductor package. As shown therein, a lead frame has leads 2 that are downwardly stepped, and a semiconductor chip 4 is attached to the leads 2 by a double-faced adhesive tape 3. Also, a plurality of bond pads 5 formed on the semiconductor chip 4 are connected to the lead frame by metal wires 6. An insulation resin 7 packages the metal wires 6, the semiconductor chip 4, and a predetermined portion of the lead frame. Bottom portions of the leads 2 are not covered by the insulation resin 7. The exposed portions of the leads can be used to connect the semiconductor chip 4 to external circuits.
FIG. 2 is a bottom view of the BLP semiconductor package shown in FIG. 1. As shown therein, the bottom portions of the leads 2 are exposed, and the remaining portions of the leads 2 are covered by the insulation resin 7.
A background art fabrication method of the BLP semiconductor package will now be described with reference to FIGS. 3-8. First, a lead frame 1, as shown in FIG. 3, is provided. The lead frame may be in the form of a long thin strip to which multiple semiconductor chips will be attached. As shown in FIG. 4, the leads are step shaped such that a center portion 1 of a predetermined area of the lead frame rises above each of the leads 2. Next, as shown in FIG. 5, a double-faced adhesive tape 3 is attached to the lower portions of the leads 2 of the lead frame. A semiconductor chip 4, having a plurality of bond pads 5, is fixedly attached to the leads 2 with the double-faced adhesive tape 3.
As shown in FIG. 6, corresponding bond pads 5 and leads 2 are connected by a plurality of wires 6. Next, as shown in FIGS. 7 and 8, a molding process is performed, so that an insulation resin 7 packages a predetermined portion of the lead frame, the semiconductor chips, and the wires 6. Bottom portions of the leads 2 remain exposed. Any resin flashes attached to the leads 2 are removed, and the leads 2 are plated.
In some instances, multiple BLP packages will be formed in strips, using a lead frame like the one shown in FIG. 3. FIG. 7 is a vertical cross-sectional diagram of a BLP semiconductor package strip. In this instance, it is necessary to cut the strip along each line X-X', to separate the strip into individual, complete BLP semiconductor packages, as shown in FIG. 8.
The background art BLP semiconductor package described above has several problems. When attempts are made to fabricate a package having over 40 pins, defects such as a solder bridge between the pins, can occur. Further, while the output terminals of the semiconductor package are exposed at a bottom surface of the insulation resin, each exposed portion of the output terminals has little or no height. Therefore, it may be difficult to form a solder filet to connect the leads to a circuit board, and a reliability of the solder joint can be poor. Moreover, since resin flashes may be attached to the leads after the molding process, all packages may not have the same quality.